In recent years, image sensors based on C-MOS-type semiconductor manufacturing processes (hereinafter, referred to as C-MOS image sensors) have been widely put into practical use. A C-MOS image sensor can sequentially read pixel signals acquired from individual unit pixels 21 that are arranged two-dimensionally in, for example, m columns×n rows. Specifically, in the C-MOS image sensor, m column signal lines for transmitting pixel signals generated from n unit pixels 21 arranged in a vertical direction (referred to as a column direction) and n horizontal selection lines for selecting m unit pixels 21 arranged in a horizontal direction are arranged in a grid-like manner. The C-MOS image sensor is an image pickup device for sequentially scanning, on a one-by-one basis, the unit pixels 21 of m columns and n rows via these column signal lines and horizontal selection lines to generate image signals.
In order to capture, with the use of such an image pickup device, high-quality images based on, for example, full HD (Full High Definition) standards or the like, it is required to output more pixel data items per unit time from the C-MOS image sensor. Thus, the C-MOS image sensor needs to output pixel data items at a higher pixel rate. In the case of capturing image signals at a high pixel rate as described above, in order to achieve output to the outside at a transmission rate similar to a conventional transmission rate, the number of output terminals of the image pickup device needs to be increased. Thus, there is a problem in which the circuit scale is increased.
In order to solve such a problem, an idea of increasing the reading speed of pixel data items from the individual unit pixels 21 in the C-MOS image sensor and outputting image signals read at a high speed to the outside through a small number of output terminals can be considered. Here, in a case where the reading speed of pixel signals from the individual unit pixels 21 is simply increased, the electric power consumption within the C-MOS image sensor and noise generated during reading are increased.
In order to reduce the negative effects brought about by such an increase in the reading speed, a solid-state image pickup device for generating a high-speed clock from a low-speed clock, reading pixel data items for four pixels from a C-MOS image sensor on the basis of the low-speed clock, and outputting the pixel data items through a plurality of differential transmission channels to the outside on the basis of the high-speed clock is suggested in Japanese Unexamined Patent Application Publication No. 2005-86224.
In the solid-state image pickup device suggested in Patent Document 1 described above, the C-MOS image sensor is operated on the basis of the low-speed clock and an output-side circuit for outputting pixel data items is operated on the basis of the high-speed clock. Thus, compared with a case where all the processing blocks in the entire device are operated at high speed, a reduction in noise generated within the C-MOS image sensor and suppression of the increase in the electric power consumption can be achieved.